Posted: September 14th, 2017

ELECTRONIC AND ELECTRICAL FUNDAMENTALS

ELECTRONIC AND ELECTRICAL FUNDAMENTALS

1.
Convert the following numbers.
(
a
)
21
10
Decimal to Binary
(
b
)
B9
16
Hexadecimal to Binary
(
c
)
10011001
2
Binary to Decimal
2.
With reference to Figures Q2(
a
) and Q2(
b
) name the components shown and state
one
application for each.
(
a
)
(
b
)
Page two
Figure Q2(
a
)
Figure Q2(
b
3.
In an experiment to plot the magnetic field between two magnetic poles, a brass
ring and an iron ring were placed in the field and the field pattern recorded. The
results are shown in Figures Q3(
a
) and Q3(
b
).
(
a
)
State which result shows the experiment with the brass ring and justify your
answer.
(
b
)
A 500
mm conductor carrying a current of 10
A is placed in a magnetic field of
5
T. Determine the force acting upon the conductor.
4.
The waveform shown in Figure Q4 was obtained from a display instrument.
Determine the following.
(
a
)
The peak to peak value of the waveform.
(
b
)
The r.m.s. value of the waveform.
(
c
)
The period of the waveform.
Page three
Figure Q3(
a
)
Figure Q3(
b
)
N
S
N
S
100
50
0
–50
–100
V
t (ms)
Figure Q4
10
20

5.
One possible circuit configuration using an operational amplifier is shown in
Figure Q5. The supply voltages are not shown.
(
a
)
Name the circuit configuration.
(
b
)
Calculate the gain of the circuit.
(
c
)
Calculate the input voltage to the circuit.
6.
Draw, using BS symbols, the logic diagrams for the following expressions.
(
a
)
(
b
)

R
2
R
1
100
K
10
K
Input
1
kHz
V
OUT
=
550
mV
Figure Q5
Z = (A + B + C) . (A + B + C)
Z =
(A + B + C) . (A + B + C)

7.
A diode is connected as shown in Figure Q7. Using the information provided, and
assuming the volt drop across the diode is 0·7
V:
(
a
)
Sketch the input and output voltage waveforms;
(
b
)
Explain the difference between the two waveforms.
8.
The circuit shown in Figure Q8 is a common emitter amplifer.
(
a
)
State the phase angle between V
IN
and V
OUT
.
(
b
)
When component C
E
is removed, the gain of the circuit falls drastically.
Explain why the gain of the amplifier falls when C
E
is removed.
(
c
)
State the purpose of R
1
and R
2
in Figure Q8.

R
L
V
OUT
10
V
rms
50
Hz
D1
Figure Q7
Figure Q8
V
cc
12
V
V
OUT
0
V
V
IN
R
1
R
2
R
C
R
E
C
E
C
2
TR1
C
1

The sketch in Figure Q9 shows an industrial sand mixing system. The valve (Z)
on the reclaimed sand hopper (B) can only be opened if the belt (C) is stopped and
the belt (D) is running and the main sand hopper is at Mid Level (M) but not at
High Level (H).
(
a
)
Determine the logic output required to open the valve (Z).
(
b
)
Draw, using BS symbols, a logic diagram for this system using only 2-input
gates.
Valve (Y)
Valve (Z)
Belt (C)
Belt (D)
Main Hopper
High Level (H)
Mid Level (M)
Low Level (L)
Hopper (A)
New
sand
Hopper (B)
Reclaimed
sand
Figure Q9

a
)
Figure Q10(
a
) shows the currents in a circuit. Determine the currents I
1
, I
2
,
I
3
, I
4
, I
5
and I
6
.
(
b
)
Figure Q10(
b
) shows the voltages in a circuit. Determine the voltages V
1
, V
2
,
and V
IN
.
10
A
2
A
5
A
1
A
6
A
Figure Q10(
a
)
Figure Q10(
b
)
1
A
I
5
I
6
I
3
I
4
I
2
I
1
10
V
4
V
V
2
V
1
5
V
V
IN
V
OUT
= 10
V

(
c
)
For the circuit shown in Figure Q10(
c
) below, the variable resistor (R
V
) can be
varied between 15
?
and 25
?
.
Determine:
(i)
the maximum circuit resistance;
(ii)
the minimum circuit resistance;
(iii)
the maximum supply current;
(iv)
the minimum supply current;
(v)
the maximum circuit power;
(vi)
the maximum power dissipated by the 8
?
resistor;
(vii)
the maximum energy consumed by the 8
?
resistor in 1·5 hours.
8
?
5
?
9
V
20
?
R
V
Figure Q10(
c
)

(
a
)
Add the following binary numbers.
(i)
1100
2
+ 0101
2
(ii)
0111
2
+ 1101
2
(
b
)
Draw the logic circuit using ANSI symbols for the following logic expression.
(
c
)
For the circuit shown in Figure Q11(
c
),
(i)
state the type of gate used;
(ii)
determine the logic level at points A and C when point B is Low (logic 0).
(
d
)
For the circuit shown in Figure Q11(
d
),
(i)
determine the circuit Boolean expression;
(ii)
construct the circuit truth table.
A fault condition causes all the NAND gate outputs to be High (logic 1).
(iii)
Determine the new outputs for Z.
Page nine
Z = A.B +
A.
C
+
A.B.
C
Figure Q11(
c
)
Figure Q11(
d
)
A
C
B
A
B
C
Z
.
(
a
)
For the circuit shown in Figure Q12(
a
) below, the variable resistor (R
V
) can be
varied between 5
k
?
and 15
k
?
.
(i)
Name the circuit configuration.
(ii)
State the names given to the input terminals labelled ‘–’ and ‘+’.
Determine:
(iii)
the maximum V
OUT
pk–pk
;
(iv)
the minimum V
OUT
pk–pk
;
(v)
the value of R
V
required to give a V
OUT
pk–pk
of 1·4
V.
25
k
?
R
V
Figure Q12(
a
)
5
k
?
V
IN
= 0·2
V
pk–pk
V
OUT
pk–pk
(
b
)
For the circuit shown in Figure Q12(
b
) below,
(i)
name the circuit configuration;
(ii)
name the transistor terminals 1, 2 and 3;
(iii)
determine the circuit gain;
(iv)
determine the peak (pk) output voltage;
(v)
state the purpose of capacitor C
3
.
Figure Q12(
b
)
R
1
0
V
V
DD
= +20
V
V
IN
= 500
mV
pk–pk at 1
kHz
V
OUT
= 10
V pk–pk
C
1
C
3
C
2
R
3
R
2
2
3
1

(
c
)
The circuit shown in Figure Q12(
c
) is used to control the power supplied to a
lamp.
(i)
Name the components labelled X and Y.
(ii)
Explain the purpose of R
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