Posted: September 14th, 2017

ELECTRONIC AND ELECTRICAL FUNDAMENTALS

ELECTRONIC AND ELECTRICAL FUNDAMENTALS

Convert the following numbers.
(
a
)
Binary to decimal
10101111
2
(
b
)
Decimal to hexadecimal
123
10
(
c
)
Hexadecimal to Binary
CD
16
2.
Identify the pin connections for the circuit symbols shown in Figure Q2(
a
) and
Figure Q2(
b
).
Figure Q2(
a
)
1
3
2
Figure Q2(
b
)

3.
(
a
)
For the circuit shown in Figure Q3(
a
) below, determine:
(i)
the voltage V
AE
;
(ii)
the voltage V
AB
;
(iii)
the voltage V
CD
.
(
b
)
For the circuit shown in Figure Q3(
b
) below, determine:
(i)
I
1
;
(ii)
I
2
;
(iii)
I
3
.
1
1
1
1
1
1
(6)
Page three
Figure Q3(
b
)
R
1
R
2
R
3
2
A
I
2
3
A
I
3
9A
I
1

Figure Q3(
a
)
V
S
= 12
V
V
AC
= 5
V
V
AE
A
B
C
D
E
V
AB
V
BC
= 2
V
V
CD
V
DE
= 3
V

Determine the logic input X,Y and Z for each of the gates shown in Figure Q4(
a
),
Figure Q4(
b
) and Figure Q4(
c
).
(
a
)
(
b
)
(
c
)
Figure Q4(
a
)
0
X
1
Figure Q4(
b
)
Figure Q4(
c
)
1
0
Y
Z
0
1

For the circuit shown in Figure Q5:
(
a
)
name the circuit configuration;
(
b
)
determine the circuit voltage gain.
6.
Figure Q6 shows a current carrying conductor placed between the poles of a magnet.
State the effect on the force acting upon the conductor when:
(
a
)
the current is doubled;
(
b
)
the current direction is reversed;
(
c
)
the poles are reversed;
(
d
)
a stronger magnet is used.

Figure Q6
N
S
Figure Q5
V
DD
=
+
20
V
C
1
R
3
R
1
R
2
C
2
C
3
1
2
3
0
V
V
OUT
= 10
V
pk-pk
V
IN
= 250
mV
pk-pk
at 1
kHz

The diagram in Figure Q7 includes a variable resistor (R
V
) that can be varied between
1
k
W
and 10
k
W
.
(
a
)
Determine the output voltage (pk-pk) when R
V
is 8
k
W
.
(
b
)
Determine the minimum value of output voltage (pk-pk).
(
c
)
Explain why an output voltage of 500
mV (pk-pk) is not achievable with the
50
mV (pk-pk) input voltage.
(
d
)
Determine the new value of input voltage that would enable an output voltage
of 500
mV (pk-pk) to be achieved when R
V
is set for maximum gain.
8.
For the circuit shown in Figure Q8:
(
a
)
determine the Boolean expression for output Z;
(
b
)
draw the truth table for the circuit.
(
c
)
A fault condition causes the invertor output to be permanently High.
Complete the truth table for this condition.

V
OUT
pk-pk
R
V
V
IN
= 50
mV
pk-pk
R
in
2
k
W
Figure Q7
Figure Q8
9.
For the circuit shown in Figure Q9, state:
(
a
)
which switch(es) should be closed to give minimum R
AB
;
(
b
)
which switch(es) should be closed to give maximum R
AB
;
(
c
)
which switch(es) should be closed to make R
AB
12
W
.
Page seven
30
W
15
W
5
W
20
W
20
W
Figure Q9
SW1
SW2
SW3
R
AB
(
a
)
Add the following binary numbers.
(i)
0011
2
+ 0111
2
(ii)
0100
2
+ 0111
2
(
b
)
(i)
State the Boolean expression for the following logic gate.
(ii)
Construct the truth table for this logic gate.
(
c
)
Using the Datasheet provided, select the required logic chips and mark the
logic chip number and pin numbers on the logic diagram on Worksheet Q10(
c
).
Note
: You may use any of the 6 logic chips and each logic chip may only be
used once.
(
d
)
(i)
Draw, using BS symbols, the logic diagram for the following Boolean
expression.
Z
=
(R+S+T) . (S+T)
(ii)
Construct the truth table for this expression.
(
e
)
The circuit shown below in Figure 10(
e
)(i) has developed a fault and upon testing
the outputs shown in the truth table Figure 10(
e
)(ii) were obtained. Determine
which gate (input or output) is at fault and state the nature of the fault.
A
B
C
>
1
ABC
1
2
3
4
5
Z
Figure 10(
e
)(i)
A
B
C
Z
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
0
1
1
0
0
1
1
1
0
(
a
)
For the waveform shown in Figure Q11(
a
) determine:
(i)
the peak value of the voltage;
(ii)
the rms value;
(iii)
the period of the waveform.
(
b
)
(i)
A coil of length 0·5
m is moved through a magnet field of 0·25
T at a
speed of 10
ms
-1
. Calculate the induced voltage.
(ii)
The same coil is now inserted in a magnet field of 1·2
T and is connected
to a supply. Determine the current flowing in the conductor if the force
on the conductor is measured at 2·4
N.
Page nine
1
2
1
2
3
350
V
Emf
0·25
ms
0·5
ms
0·75
ms
1
ms
280
V
210
V
140
V
70
V
0
–
70
V
–
140
V
–
210
V
–
280
V
–
350
V
Figure Q11(
a
)
(
c
)
For the circuit shown in Figure Q11(
c
) determine:
(i)
the supply voltage V
S
;
(ii)
the total circuit resistance;
(iii)
the current through resistor R
3
;
(iv)
the voltage across resistor R
3
;
(v)
the value of resistor R
4
;
(vi)
the voltage across resistor R
1
;
(vii)
the value of resistor R
1
.
(
d
)
For the circuit shown in Figure Q11(
d
) determine:
(i)
the power dissipated in the 10
W
resistor R
2
;
(ii)
the total power dissipated in the circuit;
(iii)
the energy consumed, in Joules, if the circuit is operated for 2 hours.
Page ten
2
2
1
1
1
2
2
2
1
2
(25)
10
W
20
W
20
W
5
W
10
W
Figure Q11(
c
)
R
1
R
2
R
3
R
4
R
5
R
6
R
7
V
S
1
A
2
A
8
A
10
W
20
W
180
V
Figure Q11(
d
)
R
1
R
2
R
3
R
4
1
A
6
A

12.
(
a
)
Identify the circuit shown in Figure Q12(
a
) and identify the purpose of each of
the capacitators C
1
, C
2
and C
3
.
(
b
)
For the circuit shown in Figure Q12(
a
) calculate:
(i)
the collector current I
c
;
(ii)
the base current I
b
;
(iii)
the current through the resistor R
2
;
(iv)
the value of the resistor R
1
.
4
2
2
2
3
R
1
R
3
R
4
R
2
Figure Q12(
a
)
Ideal transistor
h
fe
=
500
6k8
1k5
1·4
V
0
V
6
V
V
cc
12
V
I
c
I
b
C
1
C
2
C
3
[Turn over for Question 12(
c
) and (
d
) on
(
c
)
For the circuit shown in Figure Q12(
c
).
(i)
Identify the circuit configuration shown in Figure Q12(
c
).
(ii)
Determine the gain of the circuit and the input voltage.
(iii)
When setting up the circuit it is found that for an input of 0
V the output
is not zero.
A
What component in Figure Q12(
c
) will allow the output to be
adjusted to zero?
B
What is this process called?
(
d
)
Sketch the output waveform for the circuit shown in Figure Q12(
d
) with
(i)
SW1 open, and
(ii)
SW1 closed.

Figure Q12(
d
)
C
1
D
1
SW1
R
L
V
OUT
20
V
50
Hz
1
2
3
5
6
R
2
R
1
Figure Q12(
c
)
V
IN
V
OUT
= 550
mV
10
k
W
100
k
W
R
v

)

Datasheet for Question 10(
c
)
Logic Data sheet
Note: You may use any of the 6 logic chips and each logic chip may only be
used once.

9
10
11
12
13
14
V
cc
8
9
10
11
12
13
14
V
cc
8
9
10
11
12
13
14
V
cc
8
9
10
11
12
13
14
V
cc
8
9
10
11
12
13
14
V
cc
8
9
10
11
12
13
14
V
cc
12
34
56
7
Gnd
12
34
56
7
Gnd
12
34
56
7
Gnd
12
34
56
7
Gnd
12
34
56
7
Gnd
12
34
56
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