Posted: February 15th, 2017

The “Lab5” doc requires the questions to be answered and for every answer you must write “Answer: (Highlight answer)

VHDL

Go through example 5-17 Go step by step on how to enter a truth table in VHDL Using a Vector Signal Go through example 5-22, example 5-23 Work problems C5-5, C5-6, and C5-7a&b

The “Lab5” doc requires the questions to be answered and for every answer you must write “Answer: (Highlight answer)”

The VHDL part needs to be in a separate file named CE212_Lab4

I’ve also upload the book for this class. It’s called Digital Electronics